High speed digital packet switching system

Details High speed digital packet switching system High speed digital packet switching system

1990-06-20

1991-08-06

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 54, 370 941, H04Q 1104, H04L 1256

Patent

active

050383434

ABSTRACT:
A 3-stage switching system is provided for generating, i.e. finding, reserving and setting, path from one switch entrance port (1) to at least one switch exit port (transmit side) for asynchronously received and buffered data cells. While an Nth cell is being transferred, control means (36) generate a control word including the switch exit port address for cell (N+1)th to be subsequently transferred. Said control word is used to find and reserve a path through the switch on a stage-by-stage basis, and then set said path, if any, using a fed back acknowledgement. The (N+1)th cell path generation is performed during cell N transfer, on a cycle stealing basis.

REFERENCES:
patent: 4656622 (1987-04-01), Lear
patent: 4696000 (1987-09-01), Payne
patent: 4761780 (1988-08-01), Bingham et al.
patent: 4817084 (1989-03-01), Arthurs et al.
patent: 4821258 (1989-04-01), Fraser
IBM Technical Disclosure Bulletin, vol. 28, No. 6, 11-85, pp. 2633-2634.

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