High-speed digital multiply-by-device

Details High-speed digital multiply-by-device High-speed digital multiply-by-device

1975-12-03

1977-08-09

Malzahn, David H.

Registers

Transfer mechanism

Traveling pawl

G06F 752

Patent

active

040412962

ABSTRACT:
High speed digital multiply-by-three device comprising a sum generation unit associated with a carry look-ahead unit, the latter comprising means for generating the carry bit C.sub.k.sub.+1 to be fed to the (k+1).sup.th stage of said sum generation unit by performing the logic function

REFERENCES:
patent: 2879001 (1959-03-01), Weinberger et al.
patent: 2966305 (1960-12-01), Rosenberger
patent: 3437801 (1969-04-01), Wilhelm, Jr.
patent: 3691359 (1972-09-01), Dell et al.
patent: 3919535 (1975-11-01), Vattuone
R. K. Richards, Arithmetic Operations in Digital Computers D. Van Nostrand Co., Inc. 1955 pp. 113-114.
R. L. Haven "Multiplying Circuit" Western Electric Technical Digest No. 26, Apr. 1972 pp. 37-38.

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