High speed data transmitter and transmitting method thereof

Pulse or digital communications – Transmitters

Reexamination Certificate

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C365S233110

Reexamination Certificate

active

07409005

ABSTRACT:
A transmitter for transmitting data in response to N clock signals with the same period T is provided. Every two adjacent clock signals have a phase difference of T/N therebetween. The transmitter includes a clock synthesizer and a multiplexer. The clock synthesizer sequentially generates N select signals in response to level-switch states of the N clock signals, respectively, during the period T. The multiplexer is electrically connected to the clock synthesizer for selecting one of N input data signals to be outputted in response to a corresponding one of the N select signals in turn. A method for transmitting data with eliminated duty-cycle effect is also disclosed.

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Nikola Nedovic, Timing Characterization of Dual-Edge Triggered Flip-Flops, Advanced Computer Systems Engineering Laboratory Department of Electrical and Computer Engineering, Proceedings of the International Conference on Computer Design: VLSI in Computers & Processors (ICCD'01), 1063-6404/01 $10.00© 2001 IEEE.

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