High-speed data sampler with input threshold adjustment

Details High-speed data sampler with input threshold adjustment High-speed data sampler with input threshold adjustment

2005-09-30

2010-10-12

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

C375S354000, C714S012000, C713S375000, C709S248000, C704S270100, C370S503000, C370S504000, C370S505000, C370S506000, C327S141000, C327S142000, C327S144000, C327S155000

Reexamination Certificate

active

07813460

ABSTRACT:
Method and apparatus for sampling a high-speed digital signal include providing a data signal to a differential data input circuit, an offset control signal, and a strobe pulse. In response to the strobe pulse, the data signal is resolved into an output logic state based to a relatively greater extent on the differential data signal and to a relatively lesser extent on the offset control signal.

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