High speed data recording with input duty cycle distortion

Details High speed data recording with input duty cycle distortion High speed data recording with input duty cycle distortion

2007-09-25

2007-09-25

Young, Brian (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

To or from particular bit symbol

Reexamination Certificate

active

11382835

ABSTRACT:
Data from both a positive edge sample and negative edge sample are used to determine a data bit. The primary and secondary clocks capture two copies of the data. A sample is taken with a positive edge of one clock and the negative edge of the other clock each bit period. These two captured data values are combined along with the data value captured by the previous negative edge to determine the data bit value. The captured data may be dynamically de-skewed previous to being clocked into a buffer based on the clock edges sampling the data.

REFERENCES:
patent: 3575215 (1971-04-01), Boddy
patent: 3828344 (1974-08-01), Schwartz et al.
patent: 5381455 (1995-01-01), Ovens et al.
patent: 6693855 (2004-02-01), Kawashima et al.

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