High-speed data buffer

Details High-speed data buffer High-speed data buffer

2005-04-19

2005-04-19

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S144000

Reexamination Certificate

active

06882192

ABSTRACT:
Disclosed is a high-speed data buffer, wherein a buffer circuit composed of a ring counter is divided into two sampling circuits composed of a rising-edge portion and a falling-edge portion, and both of the two sampling circuits comprises a trigger circuit and a sampling clock generation circuit. In such a manner, the excess pulse edge can be ensured to occur before the correct edge so that the error data caused by the excess pulse can be over-written with the correct data input afterwards. Therefore, a clock cycle of timing margin can be obtained and the data stored in the data buffer can be ensured to be correct.

REFERENCES:
patent: 4157587 (1979-06-01), Joyce et al.
patent: 4823259 (1989-04-01), Aichelmann, Jr. et al.
patent: 5043921 (1991-08-01), Gonzalez-Lopez et al.
patent: 5250858 (1993-10-01), Strong
patent: 5789953 (1998-08-01), Au et al.
patent: 5799048 (1998-08-01), Farjad-Rad et al.
patent: 6137337 (2000-10-01), Beom
patent: 6269414 (2001-07-01), Engdahl
patent: 6535045 (2003-03-01), Vangal
patent: 6647506 (2003-11-01), Yang et al.

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