High speed counter for alternative up/down counting of pulse tra

Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Complementing a count

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377 55, 377107, 377119, H03K 2102

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active

054328306

ABSTRACT:
An asynchronous counter includes a plurality of flip-flops, cascade connected to one another, the plurality of flip-flops serially receiving successive pulse trains having varying numbers of pulses per pulse train. Switching circuitry, coupled to the plurality of flip-flops, inverts the state of each flip-flop between a first set of pulse trains and a second set of pulse trains (or first and second consecutive pulse trains) so that the counter computes a difference between the number of pulses in the first set of pulse trains and the number of pulses in the second set of pulse trains (or a difference between the number of pulses of the first pulse train and the number of the second pulse train). Initialization circuitry, coupled to the plurality of flip-flops, initializes all of the flip-flops at each predetermined even number of pulse trains.

REFERENCES:
patent: 2823856 (1958-02-01), Booth et al.
patent: 3011705 (1961-12-01), DeMong
patent: 3906195 (1975-09-01), Maejima
patent: 4870664 (1989-09-01), Hayashi
patent: 5146479 (1992-09-01), Okada
Boukreev et al., "Circuits Micro-electoniques et Technique Numerique", 1975, Mir, Moscou (SU).

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