High-speed counter

Details High-speed counter High-speed counter

1995-04-25

1997-10-28

Elmor, Reba I.

Boots, shoes, and leggings

36471501, G06F 750

Patent

active

056823428

ABSTRACT:
In a counter circuit, an n-bit input signal is stored into a register in response to a clock pulse and then dumped out of the register in response to a subsequent clock pulse and divided into a lower m-bit component and a higher (n-m)-bit component. The lower m-bit component is summed with a 1 to produce a summed m-bit component and a carry if the lower m-bit component is all 1's. The higher (n-m)-bit component is summed with a 1 to produce a summed (n-m)-bit component. In the absence of a carry, the divided (n-m)-bit component is selected and in the presence of the carry the summed (n-m)-bit component is selected. Either of the selected (n-m)-bit components is combined with the summed m-bit component to produce a summed n-bit signal which is stored back into the register.

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patent: 5410721 (1995-04-01), Divine et al.
patent: 5504698 (1996-04-01), Su

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