High speed conditional synchronous one shot circuit

Details High speed conditional synchronous one shot circuit High speed conditional synchronous one shot circuit

1996-09-04

1998-06-16

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327203, H03K 3289

Patent

active

057677182

ABSTRACT:
A high speed conditional synchronous one-shot circuit includes a master flip-flop for receiving an input signal and a clock signal and generating an output signal in response to the input signal and holding the output signal while the clock signal is high, the output signal going low upon the clock signal going low. A slave flip-flop has an input for receiving the output signal from the first flip-flop and a reset terminal for receiving a reset signal when the clock signal is low, a second flip-flop generating an output signal when the clock signal is high and in response to the output signal from the first flip-flop. In another embodiment, the one-shot circuit comprises a plurality of NAND gates, each gate having a plurality of inputs and an output.

REFERENCES:
patent: 5280203 (1994-01-01), Hung et al.
patent: 5323065 (1994-06-01), Ebihara et al.
patent: 5406134 (1995-04-01), Menut
patent: 5459421 (1995-10-01), Shaw
patent: 5552738 (1996-09-01), Ko
Sedra et al, The Latch or Data Flip-Flop, Microelectronic circuits, pp. 226-227, 1982.

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