High-speed compound semiconductor device having a minimized para

Details High-speed compound semiconductor device having a minimized para High-speed compound semiconductor device having a minimized para

1997-07-29

1999-08-17

Ngo, Ngan V.

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

257192, 257201, H01L 310328, H01L 310336, H01L 31072, H01L 31109

Patent

active

059397373

ABSTRACT:
A method of fabricating a semiconductor device includes the steps of forming an insulation film on a compound semiconductor layer, forming an opening in the insulation film so as to expose a part of the compound semiconductor layer, forming a gate electrode of a refractory metal compound on the insulation film such that the gate electrode contacts with the compound semiconductor layer at the contact hole, and removing the insulation film by a wet etching process, wherein the wet etching process is conducted by an etchant to which both of the gate electrode and the compound semiconductor layer show a resistance.

REFERENCES:
patent: 4916498 (1990-04-01), Berenz
patent: 5677553 (1997-10-01), Yamamoto et al.
patent: 5811844 (1998-09-01), Kio et al.
Ohara S et al: "InGaP/GaAs Power HBTS with a Low Bias Voltage" Technical Digest of the International Electron Devices Meeting (IDEM), Washington, Dec. 10-13, 1995, Dec. 10, 1995, Institute of Electrical and Electronic Engineers, pp. 791-794.
Takahashi T et al: "High-Reliability InGaP/GaAa HBTS Fabricated by Self-Aligned Process" 1995 IEEE International Conference on Systems, Man and Cybernetics, Vancouver, Oct. 22-25, 1995, vol. 1, Oct. 22, 1995, Institute of Electrical and Electronics Engineers, pp. 191-194.
Ya-Min Lee J et al: "The Preparation, Characterization and Application of Plasma-Enhanced Chemically Vapour Deposited Silicon Nitride Films Deposited at Low Temperatures" Thin Solid Films, 203 (1991) 275-287.

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