High speed comparator circuit with input-offset compensation fun

Details High speed comparator circuit with input-offset compensation fun High speed comparator circuit with input-offset compensation fun

1983-04-25

1985-11-12

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307269, 307291, 307352, 307355, 307358, 307491, 328147, H03K 524, H03K 1716

Patent

active

045530521

ABSTRACT:
A comparator circuit which can operate at a high-speed and with a high comparison accuracy. The comparator circuit comprises a differential amplifier provided with an input offset voltage compensating circuit which stores the offset voltage and derives an offset-free output signal from the amplifier in response to first and second states of a first control signal and a latch circuit for storing the offset-free output signal in response to a second control signal having a higher frequency than the first control signal.

REFERENCES:
patent: 4044343 (1977-08-01), Uchida
patent: 4045686 (1977-08-01), Masuda
patent: 4048524 (1977-09-01), Laugesen et al.
patent: 4121120 (1978-10-01), Wetterling
patent: 4328434 (1982-05-01), Geller
patent: 4406988 (1983-09-01), Scholz
patent: 4450368 (1984-05-01), Spence
patent: 4463272 (1984-07-01), Tucker

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