High speed clocked output driver for switching logic levels of a

Details High speed clocked output driver for switching logic levels of a High speed clocked output driver for switching logic levels of a

1991-07-10

1993-11-16

Lee, Thomas C.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

395550, 307412, 307451, 307452, 3649328, 36493542, 3649342, 364DIG2, G06F 104

Patent

active

052631737

ABSTRACT:
An output driver and method including an output pad, for performing write operations from a central processor unit to a cache memory. The driver includes a pull-up circuit electrically connected to the output pad for switching the pad to a first logic state and a pull-down circuit electrically connected to the output pad for switching it to a second logic state. A plurality of signals are input to the pull-up and pull-down circuits to perform the switching of the output pad at integer and integer and a half clock cycles.

REFERENCES:
patent: 4649299 (1987-03-01), Yamanouchi
patent: 4797579 (1989-01-01), Lewis
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patent: 4975599 (1990-12-01), Petrovick, Jr. et al.
patent: 5030904 (1991-07-01), Tanksalvala et al.
patent: 5097148 (1992-03-01), Gabara
patent: 5117133 (1992-05-01), Luebs
"CMOS PA-RISC Processor For a New Family of Workstations", by M. Forsyth et al., IEEE COMPCOM Spring '91 Digest of Papers; Feb. 1991.
"System Design for a Low Cost PA-RISC Desktop Workstation", by R. Horning et al., IEEE COMPCOM Spring '91, Digest of Papers; Feb. 1991.
"Architecture and Compiler Enhancements for PA-RISC Workstations", by D. Odnert et al., IEEE COMPCOM Spring '91 Digest of Papers; Feb. 1991.

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