High speed charge pump circuit having field effect transistors p

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

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327534, G05F 302

Patent

active

061373443

ABSTRACT:
A charge pump circuit operable with at least first to fourth phase clock signals. The charge pump circuit includes charge transfer devices connected in series through nodes. The charge transfer devices are connected to first side capacitors which are applied with second and fourth phase clock signals alternately so as to control charge transfer operations of the charge transfer devices with the second and fourth phase clock signals. The nodes are connected to second side capacitors which are applied with first and third clock signals. Each of the charge transfer devices includes a charge transfer field effect transistor connected in series between adjacent two of the nodes on opposite sides of the each charge transfer device and a boosting field effect transistor connected in series between a gate of the charge transfer field effect transistor and an input side one of the adjacent two nodes. A gate of each of the boosting field effect transistor is connected to a follower one of the nodes that is closer to an output of the charge pump circuit than an output one of the adjacent two nodes by at least one of the charge transfer devices.

REFERENCES:
patent: 5644534 (1997-07-01), Soejima
patent: 5978283 (1999-11-01), Hsu et al.
patent: 5982223 (1999-11-01), Park et al.
S. D'Arrigo et al., "A 5V-Only 256k Bit CMOS Flash EEPROM", pp. 132-133, IEEE International Solid-State Circuits Conference, 1989.

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