High speed charge balancing comparator

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

Patent

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Details

307350, 307356, H03K 522

Patent

active

045476837

ABSTRACT:
A high speed charge balancing comparator in which, without loading or affecting its input, the internal nodes and output node are maintained at voltage levels at or very close to their autozero values until a time after the commencement of the compare phase such that the polarity of the voltage at the input charge balancing node is correct. The comparator is of the type for comparing two or more voltages including a gain stage having an input node responsive to the voltages, plural internal nodes and an output node, and a plurality of switches for sequencing the voltages to the input nodes during alternate autozero and compare phases. Switches maintain the gain stage internal nodes and output node at voltage levels close to their values during the autozero phase until a time after the commencement of the compare phase.

REFERENCES:
patent: 3676702 (1972-07-01), McGrogan, Jr.
patent: 4028558 (1977-06-01), Heller et al.
patent: 4075509 (1978-02-01), Redfern
patent: 4191900 (1980-03-01), Redfern et al.

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