Boots – shoes – and leggings
Patent
1989-02-21
1992-06-09
Shaw, Gareth D.
Boots, shoes, and leggings
395400, 395550, 3642401, 3642408, 36424292, 3642563, 364DIG1, G06F 1340
Patent
active
051214873
ABSTRACT:
An improved high speed data transfer bus with virtual memory capability is disclosed. The bus has particular applications in computer systems which employ peripheral devices. The bus allows high speed data transfer through the use of a virtual memory scheme. Moreover, the present invention minimizes the number of lines required to implement the bus. The present invention also minimizes the amount of time a particular device is required to wait before it can access the bus and complete a data transfer. Moreover, the present invention employs control signals that are driven both active and inactive, facilitating interfacing the bus to low-power CMOS technology.
REFERENCES:
patent: 4494193 (1985-01-01), Brahm et al.
patent: 4550368 (1985-10-01), Bechtolsheim
patent: 4803621 (1989-02-01), Kelly
patent: 4910655 (1990-03-01), Ashkin et al.
patent: 4933835 (1990-06-01), Sachs et al.
MC68020 32-bit Microprocessor User's Manual by Motorola, Prentice-Hall, 1984, FIGS. 10-5, 10-6.
Microprocessor Systems Design: Alan Clements PWS-Kent Publishing Company; pp. 337-338, 469-491.
Chaki Kakali
Shaw Gareth D.
Sun Microsystems Inc.
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