High-speed bus structure for printed circuit boards

Details High-speed bus structure for printed circuit boards High-speed bus structure for printed circuit boards

1997-09-19

1999-08-31

Gensler, Paul

Wave transmission lines and networks

Plural channel systems

174250, 326 30, 333124, 333127, 375257, H03H 748

Patent

active

059458860

ABSTRACT:
The present invention provides for high speed signal buses in printed circuit boards. For high speed operation, each signal line of a bus has substantially the same electrical length as the other signal lines and forms a loop in two halves, each half electrically shielded from the other half. Each signal line has a first and a second terminal, with each terminal connected to a reference bias voltage through a first resistance which matches a loaded characteristic impedance of the signal line. The reference bias voltage is set at a midpoint of signal voltage swings on the signal line. Such high speed buses have particular applications to high speed memory systems with DRAMs.

REFERENCES:
patent: 4988890 (1991-01-01), Narhi et al.
patent: 5027088 (1991-06-01), Shimizu et al.
patent: 5457406 (1995-10-01), Takada et al.
patent: 5578940 (1996-11-01), Dillon et al.
patent: 5675298 (1997-10-01), Bhagwan et al.

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