High speed bus contact system

Electrical connectors – With circuit conductors and safety grounding provision – Grounding of coupling part

Reexamination Certificate

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Details

C439S068000

Reexamination Certificate

active

06503091

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the field of electrical interconnection devices, and more specifically to the field of bus connectors for portable computers.
2. Background Information
As technology grows the demand for faster more compact computers has increased. In order to reduce the size of computers and make them more portable, semiconductor devices have become and continue to become much smaller. Additionally, the layout of the semiconductor devices within a computer have become more dense. Smaller devices and more dense layouts have lead to more delicate devices and expensive repair costs.
Memory modules, for example, have become much smaller and as such the memory bus connectors within the computer itself have become smaller and more delicate. However, as technology advances computer users want to be able to easily upgrade the memory modules in their existing computer systems. Thus, it is important in the design of memory modules and memory bus connectors that they are able to withstand some abuse by the computer user when upgrading the memory modules while still maintaining the smaller and more dense layouts.
In portable computers, the space limitations have also made it important to design memory modules and memory bus connectors in a manner that would hold the memory module in a plane parallel to the motherboard rather than perpendicular to it. As illustrated in
FIG. 1
, memory bus connector
120
holds the memory module
100
in a horizontal fashion such that the memory module
100
is parallel to motherboard
130
. The parallel memory module
100
allows the portable computer to be manufactured in thinner and smaller cases improving the portability of the computer.
Vertical memory boards which are used in desktop computers take up much more room and would require more space than is available in a portable computer such as a laptop computer. As illustrated in
FIG. 2
, memory bus connector
220
holds memory module
200
in a vertical fashion such that the memory module
200
is perpendicular to motherboard
230
. A vertical memory module
200
would increase the thickness and overall size of the portable computer making the portable computer too big and bulky.
With parallel memory modules, however, come additional concerns. For example, a Small Outline Dual In Line Memory Module (SO-DIMM) contains about
144
individual contacts. Thus, the memory bus connector that connects the SO-DIMM to the motherboard has a corresponding number of contacts (or leads). As illustrated in
FIG. 3
, a prior art memory bus connector
120
, which would hold the memory module
100
parallel to the motherboard, contains top leads
141
and bottom leads
142
which interconnect to the memory module
100
. In the case of the SO-DIMM, memory bus connector
120
would have seventy-two (72) individual top leads
141
and seventy-two (72) individual bottom leads
142
, as illustrated in FIG.
4
.
FIG. 5
illustrates an enlargement of a portion of the memory bus connector
120
illustrated in FIG.
4
.
The individual top leads
141
and individual bottom leads
142
may be any combination of data signal contacts and ground members depending upon the contact layout of the particular memory module being used. Thus, there could be data signal contacts in both the top and bottom leads and there could also be ground members in both the top and bottom leads. Because the memory module
100
is parallel to the motherboard (i.e. horizontal), the top and bottom leads
141
&
142
are different lengths. The top leads
141
must be longer and bend up and over in order to connect the upper portion of the memory module to the motherboard and the bottom leads
142
are shorter since they connect the lower portion of the memory module to the motherboard.
One problem with this prior art design is that because the top leads
141
are longer, they necessarily have higher inductances. These higher inductances are not an issue for memory buses at present speeds (typically 66-100 MHz), but will become impediments to proper operation of future memory buses, where speeds of 400 MHz to 1 GHz are anticipated.
Another problem with the prior art design for the memory bus connector, illustrated in
FIG. 4
, is that there are no means for providing controlled characteristic impedances to the signal contacts. The ability to control characteristic impedances is common in other high-speed interconnection schemes, for example, backplanes. In a direct Rambus DRAM memory module it is desirable to have the ability to control the characteristic impedance to approximately 28 ohms.
In the vertical memory module
200
(illustrated in
FIG. 2
) the connecting leads in the memory bus connector
220
are all the same length and are very short (simply the distance from the motherboard to the connection on the memory module). The leads for the vertical memory module do not have to reach up and around the vertical memory module as they do in the horizontal (or parallel) memory module. Thus the vertical memory module and memory bus connector used in desktop computers do not have a significant problem with inductance.
What is needed is a memory bus connector that solves the problem of inductance that is prevalent in the parallel memory module design of portable computers. Additionally, what is needed is a memory bus connector that solves the problem of characteristic impedance that is also prevalent in the parallel memory module design of portable computers.
SUMMARY OF THE INVENTION
The present invention is a memory bus connector. The memory bus connector of the present invention has a plurality of individual contacts and a sheet grounding member.
Additional features and benefits of the present invention will become apparent from the detailed description, figures, and claims set forth below.


REFERENCES:
patent: 4932884 (1990-06-01), Eveland
patent: 5053730 (1991-10-01), Kameya
patent: 5478260 (1995-12-01), Kaufman et al.
patent: 5522737 (1996-06-01), Brunker et al.
patent: 5634819 (1997-06-01), Pan et al.
patent: 5842885 (1998-12-01), Takamoto et al.
patent: 5863213 (1999-01-01), Enomoto et al.
patent: 5882223 (1999-03-01), Igarashi
patent: 5890917 (1999-04-01), Ishida et al.
patent: 5908333 (1999-06-01), Perino et al.
patent: 5959848 (1999-09-01), Groves et al.

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