High speed bootstrapped CMOS driver

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307451, 307578, 307270, H03K 1706, H03K 19096

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active

046895051

ABSTRACT:
A bootstrapped CMOS driver circuit capable of driving large capacitance loads with small internal delays. Higher driving capability is achieved by using only n-channel transistors at the output and overdriving the transistors during the transitions. A total internal delay of less than one nanosecond for a driver may be provided with 100 ohms compatible output impedance.

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Koomen et al, "A MOST Inverter With Improved Switching Speed", IEEE JSSC, vol. SC-7, No. 3, Jun. 1972, pp. 231-237.
Knepper, "Dynamic Depletion Mode: An E/D MOSFET Circuit Method for Improved Performance", IEEE JSSC, vol. SC-13, No. 5, Oct. 1978, pp. 542-548.
Long et al, "Dynamic Logic Driver", IBM T.D.B., vol. 17, No. 7, Dec. 1974, pp. 1989-1990 (307/432).

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