High-speed bit synchronizer

Pulse or digital communications – Spread spectrum – Direct sequence

Patent

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Details

328133, 328155, H03D 324

Patent

active

050635778

ABSTRACT:
A novel high-speed bit synchronizer circuit comprises a phase detector having two phase detecting loops, each adapted to generate a partial error voltage signal which is summed together to provide a single phase voltage error signal which is employed to control a VCO in the return branch of both phase detecting loops. Each phase detecting loop comprises a comparator coupled to the input data stream and to a reference voltage to provide two outputs. An electronic switch is coupled to the output of each comparator and each switch has its partial error voltage output coupled through a summing circuit to the VCO, thus completing two phase detecting loops each adapted to generate a partial phase error signal indicative of the phase error between the input data stream and the recovered clock output of the VCO.

REFERENCES:
patent: 4870382 (1989-09-01), Keate et al.
patent: 4888564 (1989-12-01), Tshioaki
patent: 4933959 (1988-06-01), Knechtel

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