Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Identifying or correcting improper counter operation
Patent
1997-07-30
2000-02-29
Wambach, Margaret R.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Identifying or correcting improper counter operation
377 51, 377116, G06M 300
Patent
active
060318872
ABSTRACT:
An integrated circuit includes an n-bit counter having a plurality of k subcounters where both n and k are integers. At least one of the subcounters includes a switchable device adapted to receive a carry-out signal from an adjacent subcounter as a first input, a test carry signal as a second input, and a control input, the switchable device being capable of providing one of its inputs as an output, the control input capable of controlling selection of the output which is a carry signal. The subcounter also includes an n/k-bit counter, the n/k-bit counter receiving the carry signal and providing n/k output bits, and logic for combining the n/k-bits output from the n/k bit counter with the carry-out signal from an adjacent subcounter to provide an output that is a carry-out signal from the subcounter. The logic introducing a single gate delay between the carry-out signal from the adjacent subcounter and the carry-out signal from the subcounter.
REFERENCES:
patent: 3940596 (1976-02-01), Paddock
patent: 5185769 (1993-02-01), Wang
patent: 5381453 (1995-01-01), Chan
patent: 5559844 (1996-09-01), Lee.
patent: 5740219 (1998-04-01), O'Dell
Principles of CMOS VLSI Design, A systems Perspective, Second Edition, by Neil H. E. Weste and Kamran Eshraghian, published in 1993 by Library of Congress Cataloging-in-Publication Data, ISBN 0-201-53376-6, pp. 485-489.
Kolagotla Ravi Kumar
Misra Santosh K.
Mo Jiancheng
Srinivas Hosahalli R.
Lucent Technolgies Inc.
Smith David L.
Wambach Margaret R.
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