Registers – Transfer mechanism – Traveling pawl
Patent
1975-12-22
1977-08-09
Malzahn, David H.
Registers
Transfer mechanism
Traveling pawl
G06F 752
Patent
active
040412920
ABSTRACT:
A multiplication apparatus comprises a plurality of multiple generator circuits, each of which simultaneously generates binary signals representative of a predetermined multiple of a multiplicand for different digits of a group of multiplier digits. A different one of the multiple generator circuits couples to a different one of a plurality of serially connected adder circuits for applying the binary signals. Each of the multiple generator circuits includes storage circuits coupled to receive timing signals from a common source to enable an overlap in the generation of binary multiple signals minimizing the number of multiplication cycles required to perform a multiplication operation in response to multiply instructions.
REFERENCES:
patent: 3372269 (1968-05-01), MacSorley et al.
patent: 3691359 (1972-09-01), Dell et al.
patent: 3761698 (1973-09-01), Stephenson
patent: 3949209 (1976-04-01), Fett
J. E. Partridge, "Cascade Adder for Multiply Operations" IBM Tech. Disclosure Bulletin Jan., 1971, pp. 2406-2407.
R. L. Haven, "Multiplying Circuit" Western Electric Technical Digest No. 26 Apr. 1972, pp. 37-38.
Driscoll Faith F.
Honeywell Information Systems Inc.
Malzahn David H.
Prasinos Nicholas
Reiling Ronald T.
LandOfFree
High speed binary multiplication system employing a plurality of does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High speed binary multiplication system employing a plurality of, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High speed binary multiplication system employing a plurality of will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1229909