High speed binary counter

Details High speed binary counter High speed binary counter

2006-12-05

2006-12-05

Lam, Tuan T. (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Particular transfer means

Including logic circuit

C377S106000, C377S111000

Reexamination Certificate

active

07145978

ABSTRACT:
A high speed binary counter includes a counting first flip-flop for each binary bit, a single AND gate for each lower order binary bit beyond B0and B1, and at least two AND gates for each higher order binary bit. The counter also includes an input factor delay second flip-flop. The counter is further provided with a mechanism for redundant least significant terms for lesser order bits.

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