High-speed binary and decimal arithmetic logic unit

Details High-speed binary and decimal arithmetic logic unit High-speed binary and decimal arithmetic logic unit

1986-12-05

1989-09-12

Harkcom, Gary V.

Boots, shoes, and leggings

364778, 364781, 364784, G06F 750

Patent

active

048666564

ABSTRACT:
A combined binary and binary coded decimal (BCD) arithmetic logic unit (binary/BCD ALU) having a binary adder adapted to perform decimal operations on BCD data without impacting the performance of binary operations. The combined binary/BCD ALU has a look-ahead carry binary adder for generating the binary sum or logical combination of inputs to the binary adder to an output (Y), the Y output being arranged in groups of four bits. The binary adder additionally provides carry outputs Co.sub.i of the binary additions from each of the groups of four bits of the Y output. A decimal correction unit, responsive to the Y and Co.sub.i outputs from the binary adder [ALU means], corrects the binary sum from the binary adder when performing BCD arithmetic. A multiplexer selects the Y output from the binary adder to a result output when performing operations on binary data. Alternately, the multiplexer selects the output from the decimal correction unit to the result output performing operations on BCD data.

REFERENCES:
patent: 3711693 (1973-01-01), Dahl
patent: 4001570 (1977-01-01), Gooding et al.
patent: 4118786 (1978-10-01), Levine et al.
patent: 4138731 (1979-02-01), Kamimoto et al.
patent: 4263660 (1981-04-01), Prioste
patent: 4559608 (1985-12-01), Young et al.
J. W. Barrs, II et al., "PLA Binary and BCD Adder", IBM Technical Disclosure Bulletin, vol. 23, No. 1, Jun. 80.
"IEEE Transactions on Computers", vol. C-20, No. 8, Aug. 1971, High Speed Decimal Addition, pp. 862-866, by Martin S. Schmookler and Arnold Weinberger.
"Digital Computer Arithmetic", Copyright 1984 by McGraw-Hill, Inc., pp. 102-117, pp. 305-319, by Joseph J. F. Cavanagh, University of Santa Clara.

Affiliated with

Also associated with

Rating

High-speed binary and decimal arithmetic logic unit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High-speed binary and decimal arithmetic logic unit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-speed binary and decimal arithmetic logic unit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-922352