High-speed bias-stabilized current-mirror referencing circuit fo

Details High-speed bias-stabilized current-mirror referencing circuit fo High-speed bias-stabilized current-mirror referencing circuit fo

1992-06-19

1994-02-22

LaRoche, Eugene R.

Static information storage and retrieval

Floating gate

Particular biasing

365210, 36518901, G11C 700

Patent

active

052894126

ABSTRACT:
A circuit for providing reference voltages to be used by sense amplifiers of output circuitry of an integrated circuit memory array to allow the sense amplifiers to ascertain the values stored by memory cells of the array. The circuit includes a first branch which has transistor circuitry for establishing a reference current, a second branch of the circuit including a first transistor device and apparatus for mirroring the reference current through the first transistor device, and a plurality of output branches each connected to a sense amplifier to provide a reference voltage to be used by the sense amplifier. Each of the output branches includes a second transistor device with characteristics essentially identical to the characteristics of the first transistor device. Apparatus is included in the output branches for providing voltages at all terminals of the second transistor devices equal to the voltages at all terminals of the first transistor device so that the reference current through each of the second transistor devices is forced to be identical to that through the first transistor device. The second branch is replicated to increase current available and circuit speed.

REFERENCES:
patent: 4807188 (1989-02-01), Casagrande
patent: 5163021 (1992-11-01), Mehrotra et al.

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