High speed Bi-COMS input circuit fabricated from a small number

Details High speed Bi-COMS input circuit fabricated from a small number High speed Bi-COMS input circuit fabricated from a small number

1990-11-15

1992-07-21

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, H03K 1704

Patent

active

051325691

ABSTRACT:
An input circuit is responsive to a TTL-level input signal for producing a CMOS-level output signal and the complementary signal thereof and comprises a first inverter circuit implemented by a series combination of a p-channel type field effect transistor, a first output node and an n-p-n type bipolar transistor and responsive to the TTL-level input signal and a control signal opposite in phase to the input signal for producing the CMOS-level complementary output signal, a second inverter circuit implemented by a series combination of n-channel type field effect transistors and responsive to the input signal for producing the control signal, and a third inverter circuit implemented by a series combination of a p-channel type field effect transistor and an n-channel type field effect transistor and responsive to the CMOS-level complementary output signal for producing the CMOS-level output signal at a second output node, wherein the p-channel type field effect transistor of the first inverter circuit is enlarged without increasing the size of the bipolar transistor because a bipolar transistor is much larger in current driving capability than a field transistor, thereby achieving a high-speed operation.

REFERENCES:
patent: 4804868 (1989-02-01), Masuda et al.
patent: 4837462 (1989-06-01), Watanabe et al.
patent: 4849658 (1989-07-01), Iwamura et al.
patent: 4933574 (1990-06-01), Lien et al.
patent: 4999517 (1991-03-01), Yamazaki

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