High resolution TOA circuit

Data processing: measuring – calibrating – or testing – Measurement system – Time duration or rate

Reexamination Certificate

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Reexamination Certificate

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11372817

ABSTRACT:
An interpolation circuit (10) generates a plurality of intermediate amplitude values linearly related to two consecutive signal amplitude values using a system of adders and memory elements. A first stage (64) of the interpolation circuit calculates a one-half amplitude value; a second stage (66) calculates one-fourth and three-fourths amplitude values, and a third stage (68) calculates one-eighth, three-eighths, five-eighths, and seven-eighths amplitude values. A comparator (14) receives a threshold value (32) and compares each of the intermediate amplitude values to the threshold value. A decoder (16) generates a time of arrival adjustment value that is subtracted from a low resolution time of arrival to generate a high resolution time of arrival.

REFERENCES:
patent: 3754236 (1973-08-01), Dotson, Jr.
patent: 4586005 (1986-04-01), Crawford
patent: 5075880 (1991-12-01), Moses et al.
patent: 5815419 (1998-09-01), Fujitomi et al.
patent: 5987392 (1999-11-01), Tucker et al.
patent: 6687315 (2004-02-01), Keevill et al.
patent: 6763072 (2004-07-01), Matsui et al.

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