High resolution phase locked loop

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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Details

C327S147000

Reexamination Certificate

active

10710894

ABSTRACT:
A phase locked loop (PLL) generates a phase locked signal and adjusts a frequency of the phase locked signal according to an incoming signal. The PLL includes an oscillator for generating the phased locked signal and a frequency detection module electrically coupled to the oscillator. The frequency detection module includes a pattern detector for detecting the two regular patterns in the incoming signal, a counter electrically coupled to the pattern detector for calculating the number of periods of the phase locked signal corresponding to the distance between the two regular patterns, and a comparator electrically coupled to the counter for comparing the number of periods with a predetermined value to generate a control signal, and using the control signal to control the oscillator to adjust the frequency of the phase locked loop signal.

REFERENCES:
patent: 4908810 (1990-03-01), Oie
patent: 5337335 (1994-08-01), Cloetens et al.
patent: 5889418 (1999-03-01), Kim
patent: 6147530 (2000-11-01), Nogawa
patent: 6150888 (2000-11-01), Nakazawa
patent: 6331792 (2001-12-01), Tonietto

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