High resolution overlapping bit segmented DAC

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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C318S594000

Reexamination Certificate

active

07986255

ABSTRACT:
A controller receives an M-bit input and generates, in response, an S-bit upper range binary data feeding S-bit high range DAC and an R-bit lower range data feeding an R-bit low range DAC. The controller detects transition points in the M-bit input and in response, adds a transition data to the S-bit data equal to at least one least significant bit of the S-bit data and subtracts a value from the R-bit data equal to the transition data. The transition points and the transition data are detected and added at points avoiding such transitions at a full scale value of the R-bit data.

REFERENCES:
patent: 5309344 (1994-05-01), Smith
patent: 5703587 (1997-12-01), Clark et al.
patent: 5977899 (1999-11-01), Adams
patent: 6281652 (2001-08-01), Ryan et al.
patent: 7015738 (2006-03-01), Cao
patent: 2 442 278 (2008-04-01), None
Extended European Search Report for Patent Appln. 10192277.1 (Mar. 16, 2011).

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