Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Phase comparison
Reexamination Certificate
2001-08-17
2002-11-12
Le, N. (Department: 2858)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
Phase comparison
C324S076820, C324S076390, C324S076520, C324S076530, C331S015000, C331S016000, C331S017000, C331S020000
Reexamination Certificate
active
06479978
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
Certain aspects of the present invention relate generally to precise timing measurements for integrated circuits. Other aspects relate to the measurement of phase shifts in high frequency phase modulators.
2. Description of Background Information
Phase modulators are devices that modify the phase of an input signal, and may be used, for example, to synchronize the phase of an input signal to that of a local oscillator. In computer hard disk drives, phase modulators align data being read from the hard disk media to a sampling clock. When writing data to the hard disk media, phase modulators are often used to shift the phase of bit patterns on their way to the disk media.
Precision and linearity are factors frequently considered in phase modulator design. Precision, as used herein, refers to the ability of the phase modulator to repeatedly reproduce the desired amount of shift. Linearity refers to the ability of the phase modulator to produce a phase shift that is proportional to a control signal. Precision and linearity are particularly important in high performance phase modulators. For example, to test the precision and linearity of phase modulators used in modern high performance disk drives, a resolution of 10 picoseconds or less is desirable.
Conventional techniques for measuring the performance of phase modulators use a simple time interval measurement scheme in which a phase shifted version of a reference clock signal is compared to the original version of the reference clock signal.
FIG. 1
is a diagram illustrating such a conventional system.
Integrated circuit
100
includes a phase modulator
102
, a frequency synthesizer
104
, and logic and driver circuitry
106
. Frequency synthesizer
104
generates a range of possible frequencies based on a reference clock signal
108
. By varying the frequency of the signal output from frequency synthesizer
104
, frequency synthesizer
104
may test phase modulator
102
over a range of frequencies. Logic and driver circuitry
106
receives the phase shifted signal from phase modulator
102
and transmits it off integrated circuit
100
, as output signal
107
, to an external testing system (not shown). The external testing system compares output signal
107
with reference signal
108
to ensure that the phase difference between signals
106
and
107
is within acceptable tolerances of the expected phase shift from phase modulator
102
. Typically, this comparison is made over a range of frequencies and over a range of phase shift amounts.
The above-discussed technique for testing a phase modulator becomes increasing less useful as the frequency of the signal being phase shifted increases. For example, at frequencies in the order of 100 MHz and above, testing resolutions of 10 picoseconds or less are desirable. Such small resolution times, however, are not easily resolvable with external testing circuitry that directly compares the output signals. In particular, test precision is degraded by phase noise introduced at frequency synthesizer
104
, at logic and driver circuitry
106
, and in transmitting the high frequency signals through cables to the external test circuitry. Additionally, the act of simultaneously measuring and comparing high frequency signals
107
and
108
requires complicated circuitry that may itself introduce phase noise.
Accordingly, there is a need in the art to be able to more accurately test phase modulators (e.g., chip mounted phase modulators) operating at high frequencies.
SUMMARY OF THE INVENTION
An object of the present invention is to accurately and cost effectively test the performance of a phase modulator over a wide range of frequencies.
One aspect of the present invention is a device comprising a phase modulator and a phase to duty-cycle converter. The phase to duty-cycle converter is arranged to receive a reference signal and a phase shifted version of the reference signal and to output a signal based on the reference signal and the phase shifted version of the reference signal, the output signal having a duty-cycle that is a function of a phase difference between the reference signal and the phase shifted version of the reference signal.
A second aspect of the present invention is an integrated circuit comprising a frequency synthesizer, a phase modulator connected to receive a first signal and for generating a second signal having the same frequency as the first signal but shifted in phase to the first signal, a phase to duty-cycle converter, and a lowpass filter. The phase to duty-cycle converter generates an output signal having a duty-cycle that is a function of the difference in phase between the first and second signals, and the lowpass filter converts the output of the phase to duty-cycle converter to a direct current signal having an amplitude proportional to the difference in phase between the first and second signals.
A third aspect of the present invention is a system for measuring the phase difference between two signals. The system comprises an integrated circuit and a digital volt meter. The integrated circuit includes a phase modulator receiving a reference signal and generating a phase shifted version of the reference signal and a phase to duty-cycle converter arranged to receive the reference signal and the phase shifted version of the reference signal, the phase to duty-cycle converter outputting a signal based on the reference signal and the phase shifted version of the reference signal, the output signal having a duty-cycle that is a function of a phase difference between the reference signal and the phase shifted version of the reference signal.
Yet another aspect of the present invention is a method for measuring the phase difference between two signals. The method includes shifting a phase of a first signal to form a second signal; generating a third signal having a duty-cycle that is a function of the phase difference between the first and second signals; low-pass filtering the third signal; measuring the amplitude of the low-pass filtered third signal; and calculating the phase difference between the first and second signals based on the measured amplitude.
Yet another aspect of the present invention is a system for measuring the phase shift introduced by a phase modulator used to perform write pre-compensation of a bit pattern to be written to a hard disk array. The system comprises a lowpass filter for low-pass filtering a first bit pattern comprising a non-phase modulated bit pattern representing a zero phase shift, a second bit pattern comprising a non-phase modulated bit pattern representing a 100% phase shift, and a third bit pattern comprising a phase modulated bit pattern that has the phase shift that is to be measured; and a digital volt meter for measuring and recording the voltage of the filtered first bit pattern as V
noshift
, the voltage of the filtered second bit pattern as V
reference
, and the voltage of the filtered third bit pattern as V.
Yet another aspect of the present invention is a method for calculating a phase shift of a target bit in a target bit pattern. The method comprises measuring a first voltage, V
noshift
, that corresponds to the direct current (DC) value of a first bit pattern comprising a non-phase modulated bit pattern representing a zero phase shift of the target bit; measuring a second voltage, V
noshift
, that corresponds to the DC value of a second bit pattern comprising a non-phase modulated bit pattern representing a 100% phase shift of the target bit; measuring a third voltage, V, that corresponds to the DC value of a phase modulated version of the target bit pattern; and calculating the phase shift of the target bit as a percentage of a full bit shift as: (V−V
noshift
)/V
reference
×100.
REFERENCES:
patent: 3624511 (1971-11-01), Sui
patent: 3711773 (1973-01-01), Hekimain et al.
patent: 3740671 (1973-06-01), Crow et al.
patent: 3764902 (1973-10-01), Rodine
patent: 3810036 (1974-05-01), Bloedorn
patent: 3703686 (1974-11-01), Hekimian
patent: 3886462 (
Aliahmad Mehran
Brown Russell W.
Hamdan Wasseem H.
Maxtor Corporation
Miele Anthony L.
Palmer & Dodge LLP
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