Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Patent
1990-03-15
1991-04-23
Pellinen, A. D.
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
341119, H03M 178
Patent
active
050103377
ABSTRACT:
A monolithic chip with an integrated circuit forming an 18-bit D/A converter powered by a single supply of .+-.5 volts. The circuit includes a voltage reference producing two stable voltages of 3.5V and 2.5V which are directed to a control amplifier. This amplifier produces control signals for the current-source cells of a current-steering network utilizing a segmentation decoder for the three most significant bits, a collector-connected R/2R ladder for the intermediate bits, and an emitter-connected R/2R ladder for the remaining least significant bits. The control signals include one for setting the level of current through an NPN current-source transistor, a second for setting the level of current through a PMOS transistor for turning on or off a pair of switching transistors, and a third for establishing a bias voltage for the turn-on circuits for the NPN current-source transistor. An output operational amplifier has its inverting input connected to the output of the current-steering network and to a bipolar offset current circuit powered by the 3.5V output of the voltage reference. The non-inverting input of the amplifier is connected to the 2.5 volt reference voltage to establish a pseudo-ground for the amplifier. A temperature-compensation circuit is provided for the emitter-connected R/2R ladder, and uses only NPN transistors without requiring any elements interfering with the operation of the current-source transistors, and without requiring an associated amplifier.
REFERENCES:
patent: 4309693 (1982-01-01), Craven
patent: 4349811 (1982-09-01), Brokaw
patent: 4595912 (1986-06-01), Hoehn
Ganesan Apparajan
Guy Thomas S.
Hisano Shinichi
Analog Devices Incorporated
Hoff Marc S.
Pellinen A. D.
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