Semiconductor device manufacturing: process – Making passive device – Resistor
Reexamination Certificate
1998-06-26
2001-02-06
Carroll, J. (Department: 2811)
Semiconductor device manufacturing: process
Making passive device
Resistor
C438S384000, C438S385000, C438S210000
Reexamination Certificate
active
06184103
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to semiconductor devices and methods for fabricating semiconductor devices. More particularly, the present invention relates to stable, reliable, and extremely high resistance polysilicon resistors used as load elements in semiconductor memory devices such as SRAMs (Static Random Access Memory), and to methods of fabricating such load elements.
DESCRIPTION OF RELATED ART
From the very origins of the field of semiconductor electronics, there has been an almost inexorable quest for smaller and more powerful devices. With decreased size and increased power, the demands of reliability and stability of each component becomes increasingly critical. These demands are arguably greatest in the area of memory components.
For example, semiconductor SRAM (Static Random Access Memory) devices have become increasingly common due to their compactness and power. A memory cell of a typical SRAM device has either six transistors (“6T”), or four transistors and two resistors (“4T2R”). Due to its smaller size, a 4T2R memory cell SRAM device is preferable to a 6T memory cell SRAM device, since a wafer will likely yield a greater number of 4T2R memory cell SRAM chips.
A drawback, however, of 4T2R memory cell SRAM devices is that they typically require a higher standby current than 6T memory cell SRAM devices. In 4T2 memory cell SRAM devices, the standby current is determined by the memory size, the supply voltage, and the resistance of resistor elements. For a given application, the memory size and the supply voltage of a SRAM device are fixed. In order to minimize standby current it is very desirable to have resistor elements with high resistance values.
Depending on a targeted application for a SRAM device, the required resistance of the SRAM device resistor elements can range from a few hundred Gigaohms to more than ten Teraohms. In some common applications, such as cellular phones and palmtop computers, SRAM devices having extremely low standby currents are used. In such applications, therefore, the SRAM device resistor elements require resistance values in the Teraohm range.
It has proven to be relatively difficult to manufacture SRAM devices having uniform, stable, and reliable high resistance resistor elements. Instability and unreliability in SRAM device resistor elements are sometimes caused by contamination created or introduced during the SRAM device fabrication process. Contamination of semiconductor wafers having SRAM devices can be reduced by cleaning the wafer during the fabrication process. However, cleaning the wafer may also remove a portion of the polysilicon layer forming the SRAM device resistor element, resulting in a polysilicon layer having a nonuniform thickness. This thickness nonuniformity causes the SRAM device resistor elements to suffer from resistance shift or variations in resistance.
The unreliability and instability of SRAM devices due to defective resistance elements can have severe consequences. If the defective SRAM chips make their way into consumer electronics, the result will be a returned product and a damaged reputation for the manufacturer. At the very least, the rejection of unacceptable chips during quality control in the fabrication process is expensive and wasteful.
It can be seen from the foregoing that the need exists for an SRAM device that can be inexpensively and easily fabricated with uniform, extremely high resistance, stable, and reliable resistor elements.
SUMMARY OF THE INVENTION
The present invention achieves these and other objects by providing stable and reliable extremely high resistance polysilicon resistors for use as load elements for a SRAM device, and methods for their fabrication.
In one embodiment of the present invention, at least one of a plurality of resistor elements of a semiconductor device includes a polysilicon layer, and a silicon nitride layer disposed directly onto the polysilicon layer. The silicon nitride layer prevents contamination of the polysilicon layer during subsequent fabrication process steps, performed on the polysilicon and the silicon nitride layers, that form at least one of a plurality of resistors
A method of fabricating a polysilicon resistor on a semiconductor substrate is also provided. The method includes the step of depositing a layer of polysilicon on the substrate, followed by depositing a layer of protective material over the polysilicon layer to form a protected polysilicon layer. After deposition of the protective layer, resistors are formed by selectively implanting dopants through the layer of protective material and into the polysilicon layer. The dopant material can be selected from a group consisting of boron, phosphorous, and arsenic, and can be implanted at dosage levels up to 5*10
13
ions/cm
2
and at energy levels generally within a range of between 35KeV and 80KeV, depending the thickness of the polysilicon layer, and the thickness and material of the protective layers.
The step of forming resistors can include the steps of defining resistors and connection lines on the layer of protective material via photolithography, etching a portion of the protective layer and the polysilicon layer not covered with photoresist, and then removing any remaining photoresist and cleaning the substrate. Next, highly conductive regions of the protected polysilicon layer are formed by defining these regions via photolithography, and implanting dopants through the protective layer into the polysilicon layer in those portions of the protected polysilicon layer not covered with photoresist, and then removing the photoresist and cleaning the substrate.
In another embodiment, a method of processing a silicon wafer to fabricate polysilicon resistors or load elements SRAMs is described. The method includes steps of forming polysilicon resistors as load elements of a SRAM device after a silicon wafer has been processed with conventional processing techniques following a conventional processing sequence from an initial starting step or stage and up to the processing step or stage where the silicon wafer has been coated with a layer of polysilicon (i.e., the uppermost or last polysilicon layer) wherein resistor load elements of the SRAM device and some connection lines will be formed. At this stage of the fabrication process, in addition to this last polysilicon layer, the silicon wafer has bulk silicon transistors already formed therein. Another polysilicon layer (i.e., the first polysilicon layer) serves as the gate electrode for these bulk silicon transistor. Interconnects have been formed with a second polysilicon layer, contact holes have been opened and filled with the second and the last polysilicon layers, and oxide layers have been deposited between the first and second polysilicon layers and between the second and the last polysilicon layers. The first and the second polysilicon layers usually have tungsten silicide or tantalum silicide claddings. A layer of silicon nitride is then deposited onto the silicon wafer and is disposed onto the last polysilicon layer to form a protected polysilicon layer. A dopant can be implanted through the silicon nitride layer into the last polysilicon layer. Next, polysilicon resistors and connection lines are defined on the protected polysilicon layer using a first photoresist material layer deposited, selectively exposed, and developed via conventional photolithography. The portion of the protected polysilicon layer not covered with photoresist is etched off, and then any remaining material of the first photoresist material layer is removed and the wafer is cleaned. In a next step, highly conductive regions of the protected polysilicon layer are photolithographically defined. Dopant is again implanted through the silicon nitride layer into the last polysilicon layer in regions of the protected polysilicon layer which are not covered with a second photoresist material layer. The remaining developed second photoresist material layer is removed, and the wafers are cleaned.
The features of the invention believed to b
Li Jia
Wu Yaoxiong
Carroll J.
Fujii Harold T.
Sony Corporation
Tobin Christopher M.
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