High-rate RLL encoding

Coded data generation or conversion – Digital code to digital code converters – To or from minimum d.c. level codes

Reexamination Certificate

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C360S048000, C341S059000

Reexamination Certificate

active

07486208

ABSTRACT:
An unencoded m-bit data input sequence is divided into a block of n bits and a block of m−n bits. The block of n bits is divided into a first set of n+1 encoded bits, wherein at least one of P1subblocks of the first set satisfies a G, M and I constraints. The first set of n+1 encoded bits is mapped into a second set of n+1 encoded bits wherein at least one of P2subblocks of the second set gives rise to at least Q1transitions after 1/(1+D2) precoding. A second set of n+1 encoded bits is divided into P3encoded subblocks and the P3encoded subblocks are interleaved among (m−n)/s unencoded symbols so as to form a (m+1)-bit output sequence codeword which is then stored on a data storage medium.

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