High Q inductor and its forming method

Details High Q inductor and its forming method High Q inductor and its forming method

1998-10-05

2001-01-02

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Making passive device

C257S531000, C438S388000, C438S243000, C438S359000

Utility Patent

active

06169008

ABSTRACT:

GENERAL DESCRIPTION OF THE INVENTION
The present invention relates to an inductor, and in particular, to a high Q inductor and its forming method which first provides a trench on the semiconductor substrate by a basic process such as etching, then fills the trench with a high resistivity material, for example by depositing an epitaxy layer. Consequently, the substrate loss between the inductor winding and the semiconductor substrate due to the substrate resistance can be reduced by several orders of magnitude, greatly improving the quality factor of the formed inductor.
BACKGROUND TO THE INVENTION
Given of the rapid growth of wireless and RF communication markets, silicon has become as a crucial material to meet the demands of low-cost, high density integration technologies. For silicon wireless and RF IC applications, the realization of high quality factor (Q) inductors is an important task that calls for immediate attention. Generally speaking, the ratio of an inductor's reactance to its series resistance is used as a measure of the quality of the inductor. The quality factor is referred to as the Q of the inductor.
Q=&ohgr;
0
*L/R
FIG. 1
(Prior Art) is a cross sectional view of a conventional inductor. In
FIG. 1
, a semiconductor substrate
10
, such as a P type silicon substrate or an N type silicon substrate, is provided with an oxide layer
12
, such as a thin silicon oxide layer, on its surface. The inductor winding formed of intermediate layer
14
, such as another silicon oxide layer, and metal windings
16
a,
16
b on the intermediate layer
14
, is provided on the oxide layer
12
. The inductor winding is formed of multilevel interconnect with a protective layer (not shown) thereon to protect the formed inductor from being damaged.
FIG. 2
(Prior Art) is the equivalent circuit diagram of the conventional inductor as shown in FIG.
1
. As shown in
FIG. 2
, the reactance and capacitance of the metal windings
16
a,
16
b are respectively represented as an inductor L and a resistor R. The couple effect between the metal windings
16
a,
16
b is represented as a capacitor C
f
. The substrate effects between the metal windings
16
a,
16
b (input/output terminal) and the semiconductor substrate
10
(ground) are representively represented as a capacitor C
1
and a resistor R
1
as well as a capacitor C
2
and a resistor R
2
.
In this example, to get high Q inductors on silicon wafers, the series resistance R is reduced and the inductance L is increased. In addition, the inductor losses should also be controlled to some extent. Since the substrate losses are an important factor in inductor losses and are inversely proportional to the substrate effect between the metal windings and the semiconductor substrate, the substrate resistors Rl, R
2
are increased to reduce the substrate losses.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a high Q inductor and its forming method. According to the the present invention, a trench is first defined on the semiconductor substrate by dry etching to form an inductor thereon, then a high resistivity material is deposited to fill the trench. Therefore, the substrate resistance (R
1
, R
2
in
FIG. 2
) between the metal windings and the semiconductor substrate can be increased by several orders of magnitude, greatly reducing the substrate losses to an equal extent.
To achieve the above-indicated object and others, the present invention provides a method for forming a high Q inductor. The forming method includes the steps of: defining a trench on the semiconductor substrate by dry etching, and filling the trench with a high resistivity material. The resitivity of the material should be higher than that of the semiconductor substrate, such as an epitaxy layer. The trench is filled with the epitaxy layer by first depositing an epitaxy layer on the semiconductor substrate and the trench, then etching back the epitaxy layer to expose the surface of the semiconductor substrate. Thereafter, a dielectric layer is deposited on the semiconductor substrate (including the trench) and a metal winding is deposited on the dielectric layer above the trench. In this method, the dopant concentration of the epitaxy layer is lighter than that of the semiconductor substrate by several orders of magnitude, so the resistivity thereof is far higher than that of the semiconductor substrate.
The present invention also provides a high Q inductor. The high Q inductor includes a semiconductor substrate, a dielectric layer and an inductor winding. In this inductor, the semiconductor substrate is provided with a trench formed thereon. In the trench is filled with a material having a higher resistivity than that of the semiconductor substrate. The dielectric layer is formed on the semiconductor substrate and the trench. And the inductor winding is formed on the dielectric layer above the trench to obtain the high Q inductor.


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Optimization of High Integrated Inductors for Multi-Level Metal CMOS, Merrill et al., IEDM 95-983, pp. 38.71-38.74, Jan. 1995.*

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