Abrading – Abrading process – With tool treating or forming
Reexamination Certificate
2002-05-09
2004-07-20
Eley, Timothy V. (Department: 3724)
Abrading
Abrading process
With tool treating or forming
C451S072000, C451S443000
Reexamination Certificate
active
06764388
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to pads used in semiconductor device fabrication, such as in chemical-mechanical polishing (CMP), and more particularly to cleaning such pads.
BACKGROUND OF THE INVENTION
Chemical mechanical polishing (CMP) is a semiconductor wafer flattening and polishing process that combines chemical removal with mechanical buffing. It is used for polishing and flattening wafers after crystal growing, and for wafer planarization during the wafer fabrication process. CMP is a favored process because it can achieve global planarization across the entire wafer surface, can polish and remove all materials from the wafer, can work on multi-material surfaces, avoids the use of hazardous gasses, and is usually a low-cost process.
FIGS. 1A and 1B
show an example effect of performing CMP. In
FIG. 1A
, a semiconductor wafer
102
has a patterned dielectric layer
104
, over which a metal layer
106
has been deposited. The metal layer
106
has a rough top surface, and there is more metal than necessary. Therefore, CMP is performed, resulting in FIG.
1
B. In
FIG. 1B
, the metal layer
106
has been polished down so that it only fills the gaps within the dielectric layer
104
.
FIG. 2
shows an example CMP system
200
for polishing the wafer
102
of
FIGS. 1A and 1B
. The wafer
102
, with its dielectric layer
104
and metal layer
106
, is placed on a platen
202
connected to a rotatable rod
206
. A polishing pad
204
is lowered over the wafer
102
, specifically over the metal layer
106
thereof. The polishing pad
204
is also connected to a rotatable rod
206
. Slurry
210
is introduced between the polishing pad
204
and the metal layer
106
, and the polishing pad
204
is lowered, pressured against the metal layer
106
, and rotated to polish away the excess, undesired metal from the metal layer
106
. The platen
202
is rotated as in the opposite direction. The combined actions of the two rotations and the abrasive slurry
210
polish the wafer surface.
The polishing pad
204
can be made of cast polyurethane foam with fillers, polyurethane impregnated felts, or other materials with desired properties. Important pad properties include porosity, compressibility, and hardness. Porosity, usually measured as the specific gravity of the material, governs the pad's ability to deliver slurry in its pores and remove material with the pore walls. Compressibility and hardness relate to the pad's ability to conform to the initial surface irregularities. Generally, the harder the pad is, the more global the planarization is. Softer pads tend to contact both the high and low spots, causing non-planar polishing. Another approach is to use flexible polish heads that allow more conformity to the initial wafer surface.
The slurry
210
has a chemistry that is complex, due to its dual role. On the mechanical side, the slurry is carrying abrasives. Small pieces of silica are used for oxide polishing. Alumina is a standard for metals. Abrasive diameters are usually kept to 10-300 nanometers (nm) in size, to achieve polishing, as opposed to grinding, which uses larger diameter abrasives but causes more surface damage. On the chemical side, the etchant may be potassium hydroxide or ammonium hydroxide, for silicon or silicon dioxide, respectively. For metals such as copper, reactions usually start with an oxidation of the metal from the water in the slurry. Various additives may be found in slurries, to balance their ph, to establish wanted flow characteristics, and for other reasons.
Cleaning of the pad
204
is important between successive uses of the pad
204
. The pad
204
, for instance, may be a diamond disk, a type of pad that uses industrial diamonds to achieve good planarization of a semiconductor wafer. Diamonds on the pad
204
may become loose. If these diamonds are not washed away from the pad
204
, they have great potential to scratch the semiconductor wafer that is being planarized, ruining the semiconductor wafer. The cleaning of the pad
204
between polishings is known as dressing the pad
204
.
FIG. 3
shows a conventional system
300
used to clean, or dress, the pad
204
between successive uses. The pad
204
sits on a turntable
302
, that rotates as indicated by the arrow
304
. A dresser
308
rotates in the same direction on a part of the pad
204
, via an arm
306
, as indicated by the arrow
312
. Deionized water (DIW) is fed through a tube
310
onto the pad
204
at its center
310
. The DIW is thus the dressing solution used by the dresser
308
to clean the pad
204
. As the DIW is pumped onto the pad
204
, the pad
204
rotates, and the dresser
308
itself rotates on the rotating pad
204
. The system
300
is specifically one available from Ebara Technologies, Inc., of Sacramento, Calif.
A shortcoming of the conventional system
300
is that at least occasionally it is insufficient to sweep away loose diamonds from the pad
204
. This means that the loose diamonds remain present on the pad
204
the next time the pad
204
is used for CMP, it is likely to scratch the semiconductor wafer being polished, effectively ruining the semiconductor wafer. The DIW as used in the system
300
is particularly insufficient to clean loose diamonds from the pad
204
.
Therefore, there is a need for a pad cleaning system that overcomes these problems. Specifically, there is a need for a pad cleaning system that effectively sweeps away loose diamonds from a pad. There is a need for such a pad cleaning system that prevents subsequent scratching of semiconductor wafers when the pad is used again for polishing. For these and other reasons, there is a need for the present invention.
SUMMARY OF THE INVENTION
The invention relates to a high-pressure pad cleaning system that can be used in conjunction with semiconductor device fabrication tools that utilize pads, such as chemical-mechanical polishing (CMP) tools. A system of the invention includes a turntable, a first outlet, a second outlet, and a dresser. A pad used in semiconductor device fabrication is placed on the turntable, where the turntable rotates in a first direction. The first outlet supplies a dressing solution, such as deionized water (DIW) onto the pad at a first pressure, substantially at a single point on the center of the pad. The second outlet supplies the dressing solution onto the pad at a second pressure greater than the first pressure, substantially at a radial line from the center of the pad to the edge of the pad at an angle to the pad in a direction opposite to the first direction. The angle may be forty-five degrees. The dresser is positioned over and touches the pad to clean the pad by rotating against it in a second direction.
Embodiments of the invention provide for advantages over the prior art. Unlike conventional pad cleaning systems that use only a single outlet to supply dressing solution, the inventive pad cleaning system uses two outlets, where the second outlet supplies dressing solution at a pressure greater than the first outlet. Furthermore, unlike conventional systems that supply the dressing solution at a single point in the center of the pad, the inventive system supplies the dressing solution along the radius of the pad—that is, along a radial line of the pad—at an angle to the pad, and in a direction opposite to the rotation of the pad. As a result of one or more of these aspects of the invention, cleaning of the pad is superior to that in the prior art. In the case of pads having loose diamonds, it has been found that such diamonds are more likely swept away, reducing future damage to semiconductor wafers by scratching from the diamonds. Other advantages, embodiments, and aspects of the invention will become apparent by reading the detailed description that follows, and by referencing the attached drawings.
REFERENCES:
patent: 5578529 (1996-11-01), Mullins
patent: 5702563 (1997-12-01), Salugsugan et al.
patent: 5851138 (1998-12-01), Hempel, Jr.
patent: 6116993 (2000-09-01), Tanaka
patent: 6168502 (2001-01-01), Allman et al.
p
Ho Island
Hsu Jackson
Liu Ben
Liu Ying-Chih
Eley Timothy V.
Taiwan Semiconductor Manufacturing Co. Ltd
Tung & Associates
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