Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2001-12-14
2003-08-05
Young, Brian (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
Reexamination Certificate
active
06603418
ABSTRACT:
CROSS-REFERENCES TO RELATED APPLICATIONS
Not Applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable.
REFERENCE TO MICROFICHE APPENDIX
Not Applicable
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to circuits for converting electrical signals from digital to analog form, and, more particularly, to applying these circuits in source instruments for use in automatic test equipment.
2. Description of Related Art Including Information Disclosed Under 37 C.F.R. 1.97 and 1.98
Sourcing analog signals is a basic function of automatic test equipment for electronics (ATE). An analog source converts a sequence of digital values into corresponding analog levels, using a circuit conventionally known as a Digital-to-Analog converter, or DAC. As faster and more accurate electronic devices come to market, test systems must be equipped with faster and more accurate DAC's if test systems are to keep pace with advances in new devices. A difficulty arises in the design of ATE, however, because converters that are extremely fast tend to be relatively inaccurate, and converters that are extremely accurate tend to be relatively slow. To promote flexibility for testing a wide range of device characteristics, ATE developers seek to provide both high speed and high accuracy in a single converter topology.
ATE developers have long recognized that the tradeoff between converter speed and accuracy can be somewhat relieved through the use of parallel-connected DAC's. Parallel connections are established by driving the digital inputs of individual DAC's with the same digital input signal, activating the DAC's simultaneously, and adding the DACs' outputs to produce a combined analog output signal. Assuming that the output noise of each converter exceeds one LSB (Least Significant Bit), the precision of a parallel connection of N identical converters can be increased over the precision of a single converter by approximately log
2
N.
The number of converters cannot be increased indefinitely, however. With each added DAC, cost, space, and especially noise of the overall topology increase. Owing to these diminishing returns, parallel topologies seldom include greater than eight converters. Precision is therefore at most tripled, an improvement that corresponds to fewer than two bits. This improvement is not enough to allow high-speed DAC's to operate at the level of precision that many applications require.
BRIEF SUMMARY OF THE INVENTION
With the foregoing background in mind, it is an object of the invention for a single DAC topology to be both fast and precise.
To achieve the foregoing object, as well as other objectives and advantages, a topology for converting a digital input signal into a corresponding analog output signal includes a plurality of substantially identical DAC stages each having lower resolution than the digital input signal. Bits of the digital input signal are distributed to different DAC stages, and at least one bit of the digital input signal is coupled to greater than one DAC stage. A combining circuit is coupled to the outputs of the DAC stages for generating the analog output signal.
According to one embodiment, the DAC stages each include a multi-bit sigma-delta loop, which enhances precision through inherent noise shaping.
REFERENCES:
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Cascaded parallel oversampling sigma-delta modulators Xuesheng Wang; Wei Qin; Xieting Ling Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol.: 47 Issue: 2, Feb. 2000, pp.: 156-161.
Oversampling parallel delta-sigma modulator A/D conversion Galton I.; Jensen, H.T. Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol.: 43 Issue: 12, Dec. 1996, pp.: 801-810.
Effects of quantization noise in parallel arrays of analog-to-digital converters Petraglia, A.; Pinheiro, M.A.A. Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on, vol.: 5, 1994, pp.: 337-340 vol. 5.
U.S. patent application Ser. No. 09/645,367, Sheen, filed Aug. 24, 2000.
U.S. patent application Ser. No. 09/960,173, Sheen, filed Sep. 21, 2001.
Rubenstein Bruce D.
Teradyne, Inc.
Young Brian
LandOfFree
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