Amplifiers – With amplifier bypass means
Reexamination Certificate
2003-07-11
2004-11-16
Shingleton, Michael B (Department: 2817)
Amplifiers
With amplifier bypass means
C330S12400D, C330S295000, C330S292000, C330S279000
Reexamination Certificate
active
06819176
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates in general to communication systems and components therefor, and is particularly directed to a new and improved, multiple control loop-based high power operational amplifier architecture, that has particular utility in digital code modulation amplification applications.
BACKGROUND OF THE INVENTION
Spectral regrowth is a common problem in present day transmitters employed for digital modulation applications, which may operate at a relatively high peak to average power ratio on the order of 8-10 dB. In high power communication systems, this can place a very high demand on a transmitter which is designed to provide an output power on the order of 40 watts. Over the past decade a number of techniques have been pursued in an effort to reduce this peak to average ratio. One approach, known as feed-forward cancellation, installs an auxiliary amplifier in a feed-forward cancellation loop in an effort to remove intermodulation distortion produces (IMDs) generated in the main power amplifier. Practice has shown that this type of distortion cancellation scheme has reached its practical limits since the correction amplifier has to be high power to maintain good linearity.
An alternative approach, known as predistortion, inserts a predistorting vector modulator in the input path to the main power amplifier, the predistorting vector modulator operating on the AM/AM and AM/PM properties of the power amplifier. Under high load conditions the AM/AM and AM/PM properties change dynamically with variations in input power. Further enhancements for predistortion techniques may include some form of feedback to minimize the AM/AM and AM/PM effects. Despite these improvements, the power amplifier's operating condition is not optimal for power added efficiency. This burdens the power amplifier's output power requirement.
A new approach involves operating the transmitter amplifier at saturation and using polar modulation, with phase information is imparted to the transmitter input, and amplitude modulation imparted to the drain of the amplifier's output (field effect) transistor. This serves to align the amplitude and phase components, and restore the composite digital signal at the amplifier output. Unfortunately, applications in which amplitude modulators have been employed to date have been limited to constant envelope signals. The evolution for high bandwidth and high power high linearity video amplifiers have prevented the use of this technique. For decades, the telecommunication industry has been focus on handset technology for low power and low voltage devices based on CMOS process. Recent advancements for DSL, ADSL, ADSL+, devices has evolved higher voltage and higher bandwidth devices using BiCMOS process. These devices still falter for base station applications where the output voltage and output power is too low. It will be readily appreciated, therefore, that there is currently a need for a high power wide bandwidth amplitude modulator, particularly one that is capable of driving complex loads without suffering from phase margin degradation.
SUMMARY OF THE INVENTION
To meet this need, the present invention is directed to a multi-feedback loop operational amplifier architecture, comprised of a set of three control loops, which are combined via a voltage-follower-configured field effect transistor output stage. The first control loop serves as an instantaneous main amplification path of the amplifier and provides positive feedback-based Vgs correction of voltage-follower configured output field effect transistor. In order to compensate for the Vgs offset component, the first control loop extracts the Vgs offset and feeds the extracted Vgs offset over a positive feedback path to a signal summer at the input of the main amplification path. As a result of this Vgs extraction and positive feedback operation, the signal at the output of the voltage follower corresponds exactly to the signal applied to the gate of the output field effect transistor, but without the effect of Vgs offset voltage.
Although the positive feedback path of the first control loop serves to compensate for the Vgs offset, it is not perfect, due to hole trapping and electron migration in the field effect transistor, which factors tend to build up charge and produce errors in its Vgs component. The effects of these errors are best described as amplifier drooping and peaking which re-circulates through the feedback loop and mask itself as a cyclic oscillatory condition. Absolute error correction is through the use of additional loops. The second and third loops correct for these errors through respective ‘slow’ and ‘fast’, time zone correction paths. In particular, the second control loop, which has a bandwidth considerably lower than the first and third loops corrects for long term drift errors, while the third control loop, which has a bandwidth that overlaps the bandwidth of the first control loop, compensates for ringing in the main amplification path.
REFERENCES:
patent: 4528519 (1985-07-01), van Driest
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Remec, Inc.
Shingleton Michael B
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