Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2011-03-08
2011-03-08
Nguyen, Linh V (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S135000, C341S136000, C341S144000
Reexamination Certificate
active
07903016
ABSTRACT:
A high power digital to analog converter (DAC) includes (a) an array of n bipolar transistors arranged in a binary sequence, (b) a depletion mode FET and (c) an array of n switches. The collector terminals of each bipolar transistor in the array are tied together. Furthermore, the depletion mode FET includes a source terminal which is directly connected to the collector terminals of each bipolar transistor. The FET also includes a gate terminal connected to a ground potential, and a drain terminal. Each bipolar transistor is sized to be a factor larger than its preceding transistor in the array of n bipolar transistors, for example, twice as large. The array of n switches is controlled by a digital word of n bits. Each of the n switches selectively activates a respective bipolar transistor in the array of n bipolar transistors. As the n switches are selectively activated, the array of n bipolar transistors provides n binary weighted collector currents in the source terminal of the FET. The n collector currents are equal to a sum of the binary weighted collector currents. The drain terminal of the FET provides the same sum of the binary weighted collector currents.
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ITT Manufacturing Enterprises Inc.
Nguyen Linh V
RatnerPrestia
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