High performance vertical PNP transistor and method

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure

Reexamination Certificate

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C257S525000, C257S511000, C438S969000

Reexamination Certificate

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06909164

ABSTRACT:
The invention includes a method and resulting structure for fabricating high performance vertical NPN and PNP transistors for use in BiCMOS devices. The resulting high performance vertical PNP transistor includes an emitter region including silicon and germanium, and has its PNP emitter sharing a single layer of silicon with the NPN transistor's base. The method adds two additional masking steps to conventional fabrication processes for CMOS and bipolar devices, thus representing minor additions to the entire process flow. The resulting structure significantly enhances PNP device performance.

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