Fishing – trapping – and vermin destroying
Patent
1991-12-18
1992-10-20
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 41, 437 52, 437247, 437915, 148DIG109, H01L 21265
Patent
active
051569876
ABSTRACT:
The present invention introduces a method to fabricate an active PMOS thin film transistor (or p-ch TFT) having an epitaxially grown channel region for high performance operation characteristics. Typically this p-ch TFT device would be fabricated overlying an NMOS active device, thereby becoming an active load (or pullup) to an NMOS device used is such applications as creating a memory cell in static random access memories (SRAMs). Conductivity types (p-type or n-type) may be interchanged to construct an n-ch TFT coupled with a PMOS active device if so desired. The fabrication of the TFT of the present invention may be used to form a CMOS inverter or simply an active pullup device when integrated into conventional CMOS fabrication processes.
REFERENCES:
patent: 4902637 (1990-02-01), Kondou et al.
patent: 5008212 (1991-04-01), Chen
patent: 5022958 (1991-06-01), Favreau et al.
patent: 5026663 (1991-06-01), Zdebel et al.
patent: 5100817 (1992-03-01), Cederbaum et al.
patent: 5112765 (1992-05-01), Cederbaum et al.
patent: 5122476 (1992-06-01), Fazan et al.
"A High-Performance Stacked-CMOS SRAM Cell by Solid Phase Growth Technique" by Y. Uemoto et al., pp. 21-22, IEEE (1990).
Fazan Pierre
Sandhu Gurtej S.
Hearn Brian E.
Micro)n Technology, Inc.
Paul David J.
Trinh Michael
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