Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2000-03-03
2001-07-31
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
Reexamination Certificate
active
06268815
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to high speed data communications wherein signal information is processed both in digital and analog forms. More specifically, the invention is related to a digital to analog data converter integrated circuit, which solves problems associated with integration density, power consumption, and data transmission protocol compatibility for central office digital subscriber line circuit cards.
DISCUSSION OF THE RELATED ART
2. Digital Subcriber Line Applications
With the advancement of technology, and the need for instantaneous information, the ability to transfer digital information from one location to another, such as from a central office to customer premises, has become more and more important.
In a digital subscriber line (DSL) system, data is transmitted from a central office to customer premises via a transmission line, such as a two-wire pair, and is transmitted from the customer premise to the central office as well, either simultaneously or in different communication sessions. The same transmission line might be utilized for data transfer by both sites or the transmission to and from the central office might occur on two separate lines. In its most general configuration, a DSL card at a central office is comprised of a digital signal processor (DSP) which receives information from a data source and sends information to an analog front-end (AFE). The AFE serves as the interface between an analog line, such as the two-wire pair, and the DSP. The AFE functions to convert digital data, from the DSP, into a continuous time analog signal when processing downstream data. Conversely, the AFE serves to convert an analog signal to digital data when processing upstream data.
As an important part of the aforementioned system responsible for proper transmission and reception of data in a broadband network, the AFE performs multiple functions in addition to converting a digital signal into a continuous time analog signal. However, the functionality of the AFE is particular to the specific DSL application considered, wherein factors such as signal bandwidth, data rate, data reach, signal quality, power budget, and different applicable standards determine the optimum AFE. In order to minimize application specific implementations of digital to analog converters across the many DSL applications, it is desired to create a high-performance configurable digital to analog converter.
Considering the many flavors of DSL applications, the adaptability problem becomes more apparent. Focusing on ADSL applications, there are a number of different implementation standards available including: DMT-FDM, DMT-EC, G.lite, CAP-RADSL, and ADSL over ISDN, hereinafter the aforementioned ADSL applications will be denoted xDSL. For each application, the optimum AFE configuration varies. Subsequently, the digital to analog converter (DAC) implementation for each separate AFE configuration must vary appropriately.
SIGMA-DELTA MODULATION
Sigma-Delta modulation is a method used to perform both analog to digital and digital to analog conversions. It uses the concept of over-sampling and digital signal processing in order to achieve high resolution of the desired signal bandwidth. Various Sigma-Delta architectures exist with many used in instrumentation, speech, high-fidelity audio digitization, digital cellular radio, and integrated services digital network (ISDN) applications. Sigma-Delta modulation may also be employed to perform analog to digital (ADC) and digital to analog conversions (DAC) for higher frequency signals in a variety of communications systems, such as xDSL applications.
A Sigma-Delta based DAC is a common choice when both high resolution and low distortion are desired. The high resolution and low distortion requirements in xDSL applications make the Sigma-Delta architecture a natural starting point for high performance DAC designs. However, the Sigma-Delta methodology presents some problems when adapted to xDSL applications.
Most of the published Sigma-Delta DACs are used in audio applications where the signal bandwidth of interest is approximately 20 kHz. In audio applications, a high over-sampling ratio can be easily achieved. In xDSL applications, the signal bandwidth of interest increases from 20 kHz to approximately 1 MHz. Conversion of the Sigma-Delta DAC from an audio application to a xDSL application requires an increase in the sampling rate that makes designing for low power consumption and low signal distortion difficult. Decimating the input signal to the switched-capacitor (SC) filter reduces the speed requirements, but requires an additional finite impulse response (FIR) filter and an operational-amplifier (op-amp). As a result, prior art DACs in xDSL applications have not achieved the signal bandwidth requirements of multiple xDSL applications in a power-efficient manner.
SUMMARY OF THE INVENTION
In light of the foregoing, the invention is a high-performance switched-capacitor (SC) filter for oversampling digital to analog converters (OSDACs) that accommodates multiple xDSL applications in a power efficient manner, by eliminating an op-amp, avoiding signal dependent loads on reference buffers, and sharing an op-amp within the AFE. The improvements to the OSDAC of the present invention are implemented within a SC filter. More specifically, the SC filter of the present invention removes an op-amp from a SINC filter; avoids signal dependent loads on the reference buffers by increasing input signal swing through a combination of using the positive and negative voltage references with switch control of the bottom capacitor plates in the SC filter; and shares an op-amp from a sample and hold buffer to drive a smoothing filter.
In general, the preferred embodiment of the invention utilizes a SINC filter, a SC-biquad filter, and a sample and hold buffer. The SINC filter decimates the input signal by a factor of four. The SC-biquad filter tracks the input and filters out high frequency noise generated by the Sigma-Delta modulator while adding minimal distortion to the signal. Finally, the sample and hold buffer serves to create a low-distortion analog waveform and to drive the resistive load of an analog smoothing filter within the AFE.
An advantage of the invention is that it provides a low cost solution to providing a high performance DAC, which will serve multiple xDSL applications.
Another advantage associated with implementation of the present invention is that, it saves power by sharing an op-amp between the SINC filter and the SC-biquad input interface. It further reduces power requirements by removing an op-amp typically used to drive an analog smoothing filter.
A further advantage of the invention is that the DAC avoids signal dependent loading on the reference buffers by making the digital signal from the Sigma-Delta modulator control the switches at the op-amp input individually for each SINC tap in the SINC filter.
Other objects, features, and advantages of the present invention will become apparent to one of reasonable skill in the art upon examination of the following drawings and detailed description. It is intended that all such additional objects, features, and advantages be included herein within the scope of the present invention, as defined by the claims.
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Hurst et al., Finite impulse response switched-capacitor decimation filters for the DSM D/A interface, 1989 IEEE International Symposium on Circuits and Systems, May 8-11, 1989, vol. 3, pp. 1688-1691.*
Gulati et al., A High-Swing CMOS Telescopic O
Gustavsson Mikael
Tan Nianxiong
Globespan, Inc.
Thomas Kayden Horstemeyer & Risley
Williams Howard L.
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