High performance silicon wafer and fabrication process

Details High performance silicon wafer and fabrication process High performance silicon wafer and fabrication process

1977-10-31

1979-03-13

Rutledge, L. Dewayne

Metal treatment

Compositions

Heat treating

148 33, 148175, 156645, H01L 21322, H01L 21324

Patent

active

041440994

ABSTRACT:
Gettered semiconductor wafers for integrated circuit device manufacture are prepared by grinding a layer of damage into the back face of the wafer to a depth of about 8-35 microns, heating the wafer to a temperature of about 800.degree.-1150.degree. C. for about 1 to 3 hours and quickly cooling the wafer to a temperature below about 600.degree. C., and polishing both sides of the wafer to form a polished, substantially damage-free front face and a smooth back face which has a residual layer of crystallographic damage to provide additional gettering during device manufacture.

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