High performance self-checking adder having small circuit area

Details High performance self-checking adder having small circuit area High performance self-checking adder having small circuit area

1990-01-02

1991-05-21

Malzahn, David H.

Boots, shoes, and leggings

364741, 364788, G06F 1116, G06F 750

Patent

active

050180932

ABSTRACT:
A carry select adder may be used in which carry inputs to ripple adder stages are not fixed. The adder stage determines which of the two ripple adders of that stage has output the correct sum while the variable carry input is equal to a given value. Then the variable carry input value is switched to a different value and the adder stage determines the correct output sum from the other ripple adder. The adder performs self-checking by comparing these two sums to ensure that the output sum is accurate.

REFERENCES:
patent: 3660646 (1972-05-01), Minero et al.
patent: 4682303 (1987-07-01), Uya
patent: 4704701 (1987-11-01), Mazin et al.
patent: 4764888 (1988-08-01), Holden et al.

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