High performance programmable array local clock generator

Details High performance programmable array local clock generator High performance programmable array local clock generator

2005-02-01

2005-02-01

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S194000

Reexamination Certificate

active

06850460

ABSTRACT:
An SRAM array local clock generator has variable delay settings that are programmable via level scan bits. Program bits from the level scan operation are decoded and used to adjust the number of delay elements in the local clock generator path.

REFERENCES:
patent: 5553276 (1996-09-01), Dean
patent: 5790839 (1998-08-01), Luk et al.
patent: 5841712 (1998-11-01), Wendell et al.
patent: 6282131 (2001-08-01), Roy
patent: 6392466 (2002-05-01), Fletcher

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