High performance PMOSFET using split-polysilicon CMOS process in

Details High performance PMOSFET using split-polysilicon CMOS process in High performance PMOSFET using split-polysilicon CMOS process in

1995-06-16

1998-02-10

Dutton, Brian

Fishing, trapping, and vermin destroying

437 35, 437 52, 437238, H01L 21265, H01L 2102, H01L 2170, H01L 2700

Patent

active

057168628

ABSTRACT:
This invention is a process for manufacturing dynamic random access memories using stacked container capacitor cells in a split-polysilicon CMOS manufacturing flow. The split-polysilicon flow denotes that N-channel and P-channel transistor gates are formed from a single conductive layer (typically a doped polysilicon layer) using separate masking steps. In one embodiment of the present invention teaches a semiconductor manufacturing process for forming p-channel devices by the steps of: defining p-channel transistor gate electrodes having substantially vertical sidewalls over n-well regions; performing a p-type impurity implant into the n-well regions to form p-channel source and drain terminals on opposing sides of each the p-channel transistor gate electrodes; performing an angled n-type impurity implant into the n-well regions to form an n-type halo around the p-channel source and drain terminals; performing a low temperature oxidation step at a temperature ranging between 600.degree.-957.degree. C., to form poly gate sidewall oxidation about the vertical sidewalls of the p-channel transistor gate electrodes; and performing a p-type impurity implant into the n-well regions.

REFERENCES:
patent: 4567058 (1986-01-01), Koh
patent: 4683144 (1987-07-01), Nishimura et al.
patent: 4843030 (1989-06-01), Eden et al.
patent: 4912065 (1990-03-01), Mizumo et al.
patent: 4957777 (1990-09-01), Ilderem et al.
patent: 5011789 (1991-04-01), Burns
patent: 5025741 (1991-06-01), Suwanai
patent: 5057447 (1991-10-01), Paterson
patent: 5330935 (1994-07-01), Dobuzinsky et al.
patent: 5382533 (1995-01-01), Ahmad et al.
patent: 5405791 (1995-04-01), Ahmad et al.
patent: 5425392 (1995-06-01), Thakur et al.
patent: 5470777 (1995-11-01), Nagata et al.
patent: 5573965 (1996-11-01), Chen et al.
Ghandhi, "VLSI Fabricaton Principles", John Wiley & Sons, 1983, pp. 591-592.
Woff "Silicon Processing for VLSI Era", Lattice Press, 1986 pp. 50-58, 161-182.
Mayo, "Photodeposition Enhancement of Deposition by Heal and Light" Solid State Technology. 1986 pp. 141-1986.

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