High performance output buffer with reduced ground bounce

Details High performance output buffer with reduced ground bounce High performance output buffer with reduced ground bounce

1993-02-09

1994-08-23

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307465, H03K 19177

Patent

active

053410408

ABSTRACT:
The present invention provides circuitry for compensating the slew rate of an output buffer so as to reduce the magnitude of the variation in slew rate and ground bounce due to temperature and processing variations. The circuitry includes structure at the gate of each transistor that supplies or sinks current to charge or discharge capacitance at the output buffer output that slows down the turn on of the output transistors as temperature or process shifts in a way that would tend to increase the current carrying capability of the output transistor. The structure includes a transmission gate having its source connected to the gate of the output transistor, its drain connected to a capacitor, and its gate connected such that it is conducting.

REFERENCES:
patent: 5017807 (1991-05-01), Kriz et al.
patent: 5120992 (1992-06-01), Miller et al.
patent: 5151615 (1992-09-01), Egawa

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