High-performance non-volatile RAM protected write cache accelera

Details High-performance non-volatile RAM protected write cache accelera High-performance non-volatile RAM protected write cache accelera

1996-01-19

1997-12-23

Kim, Matthew M.

395855, 395445, G06F 1328, G06F 1208

Patent

active

057015163

ABSTRACT:
A data storage system is coupled to a host computer system for the transfer of data between the host and a plurality of data storage devices. The data storage devices are coupled to a plurality of data transfer channels with each data storage channel be coupled to at least a respective one of the data storage devices. Each data transfer channel includes a data buffer and an autonomously operating controller for transferring between the channels data buffer and data storage device. A non-volatile random access storage memory is provided to store cached pages of data. An interface couples the data storage system to the host and through which data is transferred. A reconfigurable data path permits selective data transfer couplings between the data transfers channels, the non-volatile memory, and the interface. A controller directs the configuration of the data path and controls a direct memory access controller for burst transferring data between the interface and the channel data buffers, between the interface and the non-volatile memory and between the non-volatile memory and the channel data buffers.

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