High performance memory system

Details High performance memory system High performance memory system

1989-02-24

1992-12-15

Beausoliel, Robert W.

Excavating

371 22, 371 391, G06F 1110

Patent

active

051723794

ABSTRACT:
An improved memory system for use in a data processing system which memory system has two memory banks and corresponding error correction circuitry associated with each. Data words of a block thereof are stored in the memory banks in an interleaved fashion wherein alternating words are stored in one bank and intervening alternating words are stored in the other bank. During a write operation the memory is controlled so that the first data word of a block stored in a memory bank uses a late write technique and all subsequent data words thereof use an early write technique. During a read operation, pairs of data words are read and checked for errors simultaneously and are then supplied in a pipelined manner.

REFERENCES:
patent: 4335458 (1982-06-01), Krol
patent: 4675869 (1987-06-01), Driessen
patent: 4715036 (1987-12-01), Oakes
patent: 4775978 (1988-10-01), Hartness
patent: 4788685 (1988-11-01), Sako
patent: 4802170 (1989-01-01), Trottier

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