High performance max-min circuit for a Fuzzy inference engine

Details High performance max-min circuit for a Fuzzy inference engine High performance max-min circuit for a Fuzzy inference engine

1993-10-25

1997-09-02

Davis, George B.

395 51, 395 61, G06F 944

Patent

active

056640625

ABSTRACT:
A Max-Min processing circuit for a Fuzzy controller includes using a pipe lined architecture. The circuit includes a first memory initialized with input values of first dimensional information, a second memory initialized with label matrixes of second dimensional informations as the number of control rules.times.the number of channels, and a third memory for generating membership signals of a label determined by signals of the first memory and the second memory. The circuit generates minimum values by comparing the membership signals of the third memory in sequence, and maximum values by comparing the minimum values in sequence.

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