Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating
Patent
1996-03-01
1998-03-10
Callahan, Timothy P.
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Clock or pulse waveform generating
327293, 327141, 327258, 327259, H03K 513
Patent
active
057265968
ABSTRACT:
A single-phase clocking scheme for use in a VLSI chip having a plurality of localized logic blocks implemented thereon is presented. The present invention includes a first level global clock buffer for receiving an external global clock and producing a first level global clock. A plurality of second level clock buffers, one corresponding to each localized logic block, receive the first level global clock via protected equal length lines, and each produce a respective second level global clock. Each of the localized logic blocks include a plurality of third level clock buffers, wherein each third level clock buffer receives the second level global clock of its respective localized logic block, and each produces a third level local clock. The third level local clock buffers within each localized logic block generate different clocking schemes from each of the other third level local clock buffers contained within the same localized block. The present invention provides improved performance of global transfers of data between localized logic blocks located on far ends of the chip because the falling edges of the third level overlapping and non-overlapping clock signals CK1, CK1N and CK2, CK2N are coincident to each other.
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Callahan Timothy P.
Hewlett--Packard Company
Lam T. T.
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