High performance load/store functional unit and data cache

Details High performance load/store functional unit and data cache High performance load/store functional unit and data cache

1993-10-29

1999-03-02

Chan, Eddie P.

395458, 395467, 395800, G06F 1202

Patent

active

058782451

ABSTRACT:
A load/store functional unit and a corresponding data cache of a superscalar microprocessor is disclosed. The load/store functional unit includes a plurality of reservation station entries which are accessed in parallel and which are coupled to the data cache in parallel. The load/store functional unit also includes a store buffer circuit having a plurality of store buffer entries. The store buffer entries are organized to provide a first in first out buffer where the outputs from less significant entries of the buffer are provided as inputs to more significant entries of the buffer.

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